CyPhOS – A component-based cache-aware multi-core operating system

DC ElementWertSprache
dc.contributor.authorBorghorst, H.
dc.contributor.authorSpinczyk, O.
dc.contributor.editorUhrig, S.
dc.contributor.editorHochberger, C.
dc.contributor.editorSchoeberl, M.
dc.contributor.editorPionteck, T.
dc.contributor.editorBrehm, J.
dc.date.accessioned2021-12-23T16:33:41Z-
dc.date.available2021-12-23T16:33:41Z-
dc.date.issued2019
dc.identifier.isbn9783030186555
dc.identifier.issn03029743
dc.identifier.urihttps://osnascholar.ub.uni-osnabrueck.de/handle/unios/17806-
dc.descriptionConference of 32nd International Conference on Architecture of Computing Systems, ARCS 2019 ; Conference Date: 20 May 2019 Through 23 May 2019; Conference Code:226179
dc.description.abstractOff-the-shelf multi-core processors provide a cost-efficient alternative to expensive special purpose processors at the cost of complex time predictability due to shared resources like buses, caches and the memory itself. This paper presents an operating system concept that takes control over the shared cache to minimize contention, by creating a component-based operating system, that is structured in small data chunks to allow better control over data and code movement in and out of the cache. An evaluation of the operating system shows that the system is able to reduce the difference between the ACET and observed WCET of a synthetic memory load test by 93% for ARM and 98% for Intel systems. Some noteworthy improvements were also achieved for the TACLe benchmarks. © Springer Nature Switzerland AG 2019.
dc.language.isoen
dc.publisherSpringer Verlag
dc.relation.ispartofLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
dc.subjectComponent-based design
dc.subjectLoad testing
dc.subjectMemory architecture, Component based design
dc.subjectMulti core
dc.subjectMulti-core
dc.subjectOperating system
dc.subjectReal time
dc.subjectReal-time
dc.subjectTiming predictability
dc.subjectTiming predictability, Cache memory
dc.titleCyPhOS – A component-based cache-aware multi-core operating system
dc.typeconference paper
dc.identifier.doi10.1007/978-3-030-18656-2_13
dc.identifier.scopus2-s2.0-85065893978
dc.identifier.urlhttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85065893978&doi=10.1007%2f978-3-030-18656-2_13&partnerID=40&md5=3dc1a14d4aee731a3ec2b017db5ef553
dc.description.volume11479 LNCS
dc.description.startpage171
dc.description.endpage182
dcterms.isPartOf.abbreviationLect. Notes Comput. Sci.
crisitem.author.deptFB 06 - Mathematik/Informatik-
crisitem.author.deptidfb06-
crisitem.author.orcid0000-0001-9469-2367-
crisitem.author.parentorgUniversität Osnabrück-
crisitem.author.netidSpOl063-
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