SAccO: An implementation platform for scalable FPGA accelerators
DC Element | Wert | Sprache |
---|---|---|
dc.contributor.author | Weinhardt, Markus | |
dc.contributor.author | Lang, Bernhard | |
dc.contributor.author | Thiesing, Frank M. | |
dc.contributor.author | Krieger, Alexander | |
dc.contributor.author | Kinder, Thomas | |
dc.date.accessioned | 2022-04-19T14:04:01Z | - |
dc.date.available | 2022-04-19T14:04:01Z | - |
dc.date.issued | 2015 | |
dc.identifier.issn | 0141-9331 | |
dc.identifier.uri | https://osnascholar.ub.uni-osnabrueck.de/handle/unios/52500 | - |
dc.publisher | Elsevier | |
dc.relation.ispartof | Microprocessors and Microsystems | |
dc.subject | Computer science | |
dc.subject | Computer hardware | |
dc.subject | Scalability | |
dc.subject | Embedded system | |
dc.subject | Computer architecture | |
dc.subject | Field-programmable gate array | |
dc.subject | Software | |
dc.subject | Hardware acceleration | |
dc.title | SAccO: An implementation platform for scalable FPGA accelerators | |
dc.type | journal article | |
dc.identifier.doi | https://doi.org/10.1016/j.micpro.2015.03.004 | |
dc.description.volume | 39 | |
dc.description.issue | 7 | |
dc.description.startpage | 543 | |
dc.description.endpage | 552 | |
dc.identifier.external | https://openalex.org/W2088576620 | |
local.import.sourcefile | openalex_uos_20220409.ris |
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geprüft am 02.06.2024