Translating timing requirements of Embedded Software systems modeled in Simulink to a timing analysis model
Autor(en): | Iyenghar, P. Noyer, A. Engelhardt, J. Pulvermueller, E. |
Stichwörter: | Chains; Embedded software; Embedded Software Engineering (ESE); Factory automation; Individual systems; MATLAB; Model-Driven Timing analysis; Scheduling analysis; Simulink; Software engineering; Timing Analysis; Timing circuits, Embedded software systems; Timing constraints; Timing requirements; Work in progress, Embedded systems | Erscheinungsdatum: | 2016 | Herausgeber: | Institute of Electrical and Electronics Engineers Inc. | Journal: | IEEE International Conference on Emerging Technologies and Factory Automation, ETFA | Volumen: | 2016-November | Zusammenfassung: | In model-based Embedded Software Engineering (ESE), individual systems are modeled with chains of components that are translated to chains of tasks/runnables for a scheduling analysis. Early analysis of response time of such systems (e.g. end-to-end path delay) provides important feedback to understand how the function blocks/components in the system may actually behave. In this paper we report on work in progress pertaining to an overall workflow for model-driven specification, translation and validation of such timing constraints in ESE projects developed using Matlab/Simulink. The challenges addressed in this workflow and future directions are outlined. © 2016 IEEE. |
Beschreibung: | Conference of 21st IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2016 ; Conference Date: 6 September 2016 Through 9 September 2016; Conference Code:124646 |
ISBN: | 9781509013142 | ISSN: | 19460740 | DOI: | 10.1109/ETFA.2016.7733662 | Externe URL: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84996497615&doi=10.1109%2fETFA.2016.7733662&partnerID=40&md5=6b8d204db87cdbae2cc26f051237513f |
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geprüft am 17.05.2024