Cache-line transactions: Building blocks for persistent kernel data structures enabled by AspecTC++

Abstract

With the availability of systems that contain large amounts of byte-addressable non-volatile memory (NVRAM), there is a growing need for data structures that can be mapped into a process's address space and be used without data (de-)serialization. While NVRAM is able to retain memory contents during system failure and power loss, data consistency has to be preserved by using transactional operations for data manipulation. This paper describes a lightweight and efficient transaction mechanism for small data structures in memory-mapped NVRAM. The size per data structure is limited to half a cache-line, so that the approach cannot serve as a general purpose mechanism for arbitrary applications, but could be used within an operating system as a low-level building block for more complex data structures. By using aspect-oriented programming with AspectC++, the mechanism can be used in an almost transparent manner, which helps to avoid many possible sources for bugs. © 2019 Copyright held by the owner/author(s).